Next-Generation Place & Route
Multithreaded Processing
Built with a thread-parallel architecture designed to utilize modern multicore CPUs across placement, optimization, clock-tree processing, routing, timing analysis, and physical-design calculations. Computational workloads are partitioned and processed concurrently for improved turnaround time on large designs.
Deterministic by Construction
PRE is designed to produce deterministic results across repeated runs and different thread counts. Ordered reductions, controlled parallel execution, and fixed-order data merges help ensure reproducible placement, routing, timing, and optimization results.
Industry-Standard P&R Commands
Provides familiar physical-design command conventions for floorplanning, placement, clock-tree synthesis, routing, timing optimization, reporting, and design analysis. This reduces the learning curve for engineers already experienced with mainstream digital implementation flows.
Integrated Timing-Driven Placement
Placement decisions can incorporate timing information to improve critical-path behavior while maintaining density, congestion, and physical-design objectives. PRE continuously evaluates physical and timing constraints during optimization.
Congestion-Aware Optimization
Analyzes routing demand and available routing resources during implementation. Congested regions can be identified early and considered during placement and optimization to reduce routing difficulty and improve design closure.
Clock Tree Synthesis
Integrated clock-tree processing supports clock distribution, buffer insertion, skew management, and timing-aware clock optimization. Clock information remains within the same implementation environment for subsequent routing and timing analysis.
Global and Detailed Routing
Provides routing infrastructure for connecting signal and clock nets while respecting technology-layer constraints, routing directions, spacing requirements, and design-rule considerations. Routing results can be analyzed directly within the PRE environment.
Timing Analysis and Optimization
Integrated timing analysis provides setup and hold information, path reporting, slack analysis, and optimization feedback during the implementation flow. Engineers can identify critical paths and evaluate the effect of physical-design changes without leaving the PRE environment.
TCL Scripting Support
Embedded TCL scripting enables automated P&R flows, parameter control, batch execution, design experimentation, and integration with existing EDA workflows. Complete implementation sequences can be scripted and reproduced.
GUI Design Environment
Integrated graphical environment for viewing floorplans, placement, routing, congestion, timing information, design hierarchy, macros, standard cells, nets, and physical-design status. Engineers can visually inspect the design throughout the implementation flow.
Detailed Design Reports
Generates implementation reports covering placement, utilization, congestion, timing, routing, clock information, design statistics, and optimization results. Reports are suitable for both interactive debugging and automated regression flows.
Cloud and On-Premise Deployment
PRE can be deployed on local workstations, compute servers, or cloud infrastructure, allowing organizations to scale physical-design compute resources according to project requirements.